Rogues Gallery: Addressing Post-Moore Computing
TimeWednesday, July 311:30pm - 5pm
DescriptionThe Rogues Gallery is a new collaborative, experimental testbed hosted at Georgia Tech that is focused on tackling “rogue” architectures for the post-Moore era of computing. Some of these devices have roots in the embedded and high-performance computing spaces, but many of the expected post-Moore technologies are limited to custom prototypes as with quantum, neuromorphic, and reversible computing devices.
This tutorial will present a brief overview of the Rogues Gallery including related tools and resources like benchmark suites for novel architectures and will focus on providing hands-on experience with two hardware rogues. Attendees will have an opportunity to learn about and program for the Emu Chick system, a near-memory computing architecture for sparse applications, and the Field Programmable Analog Array (FPAA), a mixed analog/digital platform for implementing machine learning and neuromorphic designs. We will provide and work through a set of demonstration codes based on Sparse Matrix-Vector Multiply for the Emu, and we will explore the open-source toolset and virtual machine image used to program the FPAA. Attendees will have an opportunity to continue their investigation into using post-Moore technologies by requesting a free account to access the Rogues Gallery at the end of the tutorial.